The " turbo codes " are error correcting codes whose capacity of correction approaches closely (less than 0.5 dB in the majority of the conditions of coding and spectral effectiveness) the theoretical limit predicted by C E SHANNON in 1947. Invented in 1990-91 with the ENST de Bretagne, A French Graduate School of Telecommunications Engineering ( "Electronics" and "Signal and communication" departments ), the turbo codes have succity much interest near the scientists for their use in the future systems of transmission. Thus, the CCSDS (Advisory Commitee for Space Data Systems), which brings together the specialists in 23 national agencies, of which NASA and the ESA, specified a turbo code for the new missions in remote space.
The first applications concerned, which gave place to the realization of integrated circuits (ASIC), in collaboration with Comatlas (Chateaubourg), VLSI Tech (Sophia-Antipolis), the CCETT (Rennes), the CNET (Grenoble), privileged the high flows and the diffusion. Today the request very often relates to applications to low flow and short frames, of a few hundreds of bits to a few thousands of bits. Recent work of the ENST de Bretagne as regards " turbo codes " shows that it is possible to adapt the convolutive codes to the short frames.
In the first time, this thesis will consist in showing that it is possible to produce a Turbo decoder of convolutive codes for short frames. An architecture of circuit will be proposed on the basis of already existing work. It will be pressed, in particular, on the decoders at balanced exits (SOVA: Software Output Viterbi Algorithm) whose implementation is controlled with the ENST de Bretagne.
In the second time, innovating structures will be proposed in order to replace SOVAs by new decoders as well as possible benefitting from the properties of the short frames. The algorithmic aspect and the design of circuit (interaction algorithm/silicium) will be considered.
Finally architectures of decoders of " Turbo codes " will be proposed. These architectures will privilege one or more criteria among the following: the speed of processing, the silicon consumption and surface.

On the basis of existing work, architectures of " Turbo decoding " were defined by using the algorithm SUB-MAP which is an approximation of the logarithm of the MAP (Maximum A Posteriori Probability). This last being very complex to implement; slightly degraded version SUB-MAP will be preferred to it to work out the new decoders. The SUB-MAP gives better performances compared to the SOVA for relatively significant frames (higher than 500 data). It thus brings a gain ranging between 0.2 and 0.25 dB. However its complexity is double compared to the SOVA.
Structures suggested are based primarily on the reduction of the needed memory for the implementation of the SUB-MAP which can be very significant. The speed of decoding is also taken into account. According to the constraints fixed by the designer and according to whether the application is with low flow or not, various solutions can validly be substituted for the SOVA.

Test card with SPARTAN XCS40-3

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